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AT86RF232
9.2 Transmitter (TX)
9.2.1 Overview
The Atmel AT86RF232 transmitter consists of a digital base band processor (TX BBP)
and an analog radio front end, see Figure 9-3 .
Figure 9-3. Transmitter Block Diagram.
Ext. RF front-end and
Output Power Control
Control, Registers
μC
I/F
RFP
PA
Buf
PLL – TX Modulation
TX Data
TX BBP
SPI
SPI
I/F
RFN
Frame
Buffer
Analog Domain
Digital Domain
The TX BBP reads the frame data from the Frame Buffer and performs the bit-to-
symbol and symbol-to-chip mapping as specified by IEEE 802.15.4 in Section 6.5.2.
The O-QPSK modulation signal is generated and fed into the analog radio front end.
The fractional-N frequency synthesizer (PLL) converts the baseband transmit signal to
the RF signal, which is amplified by the power amplifier (PA). The PA output is internally
connected to bidirectional differential antenna pins (RFP, RFN), so that no external
antenna switch is needed.
9.2.2 Frame Transmit Procedure
The frame transmit procedure including writing PSDU data in the Frame Buffer and
initiating a transmission is described in Section 10.2 Frame Transmit Procedure.
9.2.3 Configuration
The maximum output power of the transmitter is typically +3dBm. The output power can
be configured via register bits TX_PWR (register 0x05, PHY_TX_PWR). The output
power of the transmitter can be controlled over a range of 20dB.
A transmission can be started from PLL_ON or TX_ARET_ON state by a rising edge of
pin 11 (SLP_TR) or by writing TX_START command to register bits TRX_CMD
(register 0x02, TRX_STATE).
Figure 9-4. TX Power Ramping for maximum TX Power.
0
2
4
6
8
10
12
14
16
18
Length [ μ s]
TRX_STATE
SLP_TR
PA buffer
PA
Modulation
PLL_ON
BUSY_TX
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 0 0 0 0 0 0
103
8321A – MCU Wireless – 10/11
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